CLKSEL=00, CDPEN=0, PLLRESET=0, DIRPD=0, REPSEL=00, HSEB=0, REPSTART=0
PHY Setting Register
DIRPD | Power-Down Control 0 (0): Do not enter low power mode 1 (1): Enter low power mode |
PLLRESET | PLL Reset Control 0 (0): Disable PLL reset control for UTMI_PHY 1 (1): Enable PLL reset control for UTMI_PHY |
CDPEN | Charging Downstream Port Enable 0 (0): Disable downstream port charging 1 (1): Enable downstream port charging |
CLKSEL | Input System Clock Frequency 0 (00): 12 MHz 1 (01): Setting prohibited 2 (10): 20 MHz 3 (11): 24 MHz |
REPSEL | Terminating Resistance Adjustment Cycle 0 (00): No cycle is set 1 (01): Adjust terminating resistance at 16-second intervals 2 (10): Adjust terminating resistance at 64-second intervals 3 (11): Adjust terminating resistance at 128-second intervals |
REPSTART | Forcibly Start Terminating Resistance Adjustment 0 (0): Force terminating resistance adjustment to start 1 (1): Do not force terminating resistance adjustment to start |
HSEB | CL-only mode 0 (0): Disable CL-only mode 1 (1): Enable CL-only mode |